Sommersemester 02

Vorlesung: Advanced Processor Architectures

Professor: W. Kluge

Termin, Ort

• Di 10:00-12.30; Ue2
• Do 10:00-10:45; Ue2

Material zur Vorlesung

Folien

• Terminology
• More terminology and some ISA details
• CISC layer structure
• RISC layer structure
• Classification of basic ISAs
• Data formats
• VAX instruction formats
• IBM/360/70/90 instruction formats
• SPARC RISC instruction formats
• R/M instruction execution phases
• Profiles of machine program behavior
• RT structure for instruction fetches
• RT structure of arithmetic unit
• RT structure of mover unit
• Microprogrammed control unit
• Pipeline basics
• Execution phases of a RISC pipeline