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Pipeline

CAST uses a four--stage pipeline to achieve a good performance. It is divided into the parts: instruction fetch, instruction decode and (register) operand fetch, execution, and write--back of the result. The only effects of the pipeline shown to the assembly programmer are two delay slots for branch and load instructions. Other pipeline interlocks are treated transparently by the processor. A code reorganizer (instruction scheduler) [11] takes care of the correct order of instructions according to the pipeline constraints.